The present invention relates to the manufacture of integrated circuits. More particularly, the present invention relates to improved techniques for etching through a silicon dioxide-containing layer during the manufacture of integrated circuits.
In the manufacture of integrated circuits, a silicon dioxide-containing layer, such as borophosphosilicate glass (BPSG) layer, may be employed to insulate two conductive layers from one another. If an electrical contact is desired at a specific place between the two conductive layers, a contact hole may be formed through the silicon dioxide-containing layer into which a conductive material may be deposited to facilitate the electrical connection between the two conductive layers.
To facilitate discussion, FIG. 1 depicts a wafer 100, which includes a silicon substrate 102. Above silicon substrate 102, a polysilicon layer 104, a tungsten silicide layer 106, and a silicon nitride layer 109 are blanket deposited. In FIG. 1, silicon substrate 102 is shown exposed to a contact hole 108 through polysilicon layer 104, tungsten silicide layer 106, and silicon nitride layer 109. Contact hole 108 may be formed by masking wafer 100 with a conventional photoresist masking technique and etching through tungsten silicide layer 106 and polysilicon layer 104 with an appropriate etchant.
In FIG. 2, another silicon nitride dielectric layer is deposited above silicon nitride layer 109 and along the sidewall of contact hole 108, thereby forming silicon nitride layer 110 in FIG. 2. At the bottom of contact hole 108, the silicon nitride material has been etched back to expose silicon substrate 102 to contact hole 108.
In FIG. 3, a silicon dioxide-containing layer 302 is blanket deposited above silicon nitride layer 110 and into contact hole 108. In FIG. 4, silicon dioxide-containing layer 302 is masked with an appropriate photoresist or hard mask and etched to remove the silicon dioxide material from contact hole 108. As shown in FIG. 4, mask 404 has an opening that is slightly larger than the cross-section of contact hole 108 to create what is referred to in the art as a self-aligned contact through silicon dioxide containing layer 302 and contact hole 108. Self-aligned contacts ensure that a subsequently deposited conductive material into contact hole 108 will form an electrical contact with silicon substrate 102 even if the opening in silicon dioxide-containing containing layer 302 is slightly misaligned due to, for example, mask misalignment.
After the silicon dioxide containing layer 302 is etched in FIG. 4, mask 404 may then be removed and a conductive material, e.g., a metallic material or doped polysilicon, may be deposited above silicon dioxide-containing layer 302 and into contact hole 108 to form an electrical contact with underlying silicon substrate 102. In this manner, an electrical path is created through silicon dioxide-containing layer 302 by way of contact hole 108.
In the etching of silicon dioxide-containing layer 302, it is important for economic reasons to select an etch process that has a high etch rate through silicon dioxide-containing layer 302. It is equally important, however, that the chosen etch process has a high selectivity to silicon nitride so that silicon nitride layer 110 is not inadvertently removed while etching away the glass material in contact hole 108. This is because an undue amount of erosion of silicon nitride layer 110 in shoulder regions 410A and 410B as well as along the sidewalls of contact hole 108 may cause an inadvertent electrical short between the subsequently deposited conductive material in contact hole 108 and tungsten silicide layer 106. As can be appreciated by those skilled in the art, such inadvertent electrical shorts are undesirable as they may cause the fabricated IC to be rejected as defective.
In the prior art, when BPSG is employed as the insulating layer, its etching is typically performed in a plasma processing chamber using CHF.sub.3 as the main etchant source gas. Although CHF.sub.3 offers a satisfactory BPSG etch rate, the selectivity to silicon nitride is typically less than desired. By way of example, typical BPSG etches using CHF.sub.3 as the etchant source gas tend to result in a BPSG:silicon nitride selectivity in the range of 5:1 (i.e., the etch rate through BPSG is roughly 5 times the etch rate through silicon nitride) or even lower. For some IC's, the BPSG:silicon nitride selectivity offered by the CHF.sub.3 etchant source gas is unsatisfactory.
Selectivity to silicon nitride may be improved by using an etchant source gas that uses C.sub.4 F.sub.8 and CO. However, the improved selectivity is counterbalanced by other disadvantages of the C.sub.4 F.sub.8 /CO chemistry. By way of example, CO gas with a high degree of purity is relatively expensive to acquire, which disadvantageously increases the cost of the process. More significantly, it has been discovered that the use of the CO chemistry in a plasma processing chamber typically results in metal contamination of the wafer during the BPSG etch step. It is discovered that this metal contamination is caused by the chemical reactions between the CO additive gas and metallic components of the chamber. By way of example, CO will combine with nickel from the chamber parts to form Ni(CO).sub.4, which subsequently decomposes and causes nickel atoms to be formed on top of the wafer and to defuse into the devices of the wafer, potentially changing the electrical characteristics of the devices. The CO additive gas may also combine with iron and other metallic components of the chamber to, for example form Fe(CO).sub.5 and/or other compounds and cause similar metal contamination problems on the wafer.
In view of the foregoing, there are desired improved techniques for etching through the silicon dioxide-containing layer during the manufacture of an integrated circuit. The improved silicon dioxide-containing layer preferably employs an additive gas other than the aforementioned CO additive gas to reduce costs as well as to reduce and/or eliminate the aforementioned metallic contamination problem. The improved etch technique also preferably employs an etchant source gas that offers a commercially advantageous etch rate through the silicon dioxide-containing layer while maintaining a high selectivity to the underlying silicon nitride layer to prevent the formation of inadvertent electrical shorts in the vicinity of the contact hole.